Avoiding Inelastic Strains in Solder Joint Interconnections of IC Devices

Avoiding Inelastic Strains in Solder Joint Interconnections of IC Devices

Suhir, Ephraim

Taylor & Francis Ltd

01/2021

382

Dura

Inglês

9781138624733

15 a 20 dias

712

Descrição não disponível.
1. Analytical Modeling. 2. Method of Interfacial Compliance. 3. Thermal Stress in Assemblies with Identical Adherends. 4. Inelastic Strains. 5. Elevated Stand-Off Heights Can Relieve Thermal Stress in Solder Joints. 6. Stress Relief in Assemblies with Inhomogeneous Bonds. 7. Relieving Thermal Stress in Flip-Chip Design. 8. Board Level Dynamic Tests. 9. Accelerated Testing: HALT and FOAT. 10. Probabilistic Design for Reliability of Solder Joint Interconnections. 11. Thermal Stress in Optical Fibers
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Interfacial Shearing Stress;HALT;Solder Joint;IC Devices;Maximum Interfacial Shearing Stress;finite-element analyses;Interfacial Compliance;solder joint interconnections;Solder Material;inelastic strains;Bonding Layer;Lead Free Solder;Peeling Stress;FEA Data;Mid-cross Section;Assembly Ends;Bonding Material;Shearing Stress Functions;CGA;Assembly Components;Stiff Assembly;Drop Test Conditions;ASME Journal;Peripheral Portion;Estimated Yield Stress;Palmgren Miner Rule;Drop Impact;Assembly Size;Principal Coordinate;Drop Tests